This invention relates to low-power routing multiplexers. More particularly, this invention relates to a routing driver input multiplexer (DIM) that reduces static and dynamic power consumption.
Power consumption is an increasing concern in the design of deep sub-micron devices, such as programmable logic devices (PLD). PLDs contain many routing DIMs as part of their programmable interconnect structure. It would therefore be desirable to reduce the overall power consumption in the PLDs by reducing both the static and dynamic power consumption of routing DIMs.
A few approaches have been presented to reduce the power consumption of a routing DIM. One approach reduces the static power consumption in the DIM by turning off the DIM when it is not being used. This reduces the static power consumption by reducing the power lost through leakage currents. The dynamic power consumption is also reduced by limiting the voltage swing of the DIM. Reducing the voltage swing of the DIM reduces the power consumed by the DIM, but it also reduces the speed of the DIM and only provides a “weak” high logic output signal. Neither of these side effects of the reduced voltage swing significantly affect the performance of a PLD incorporating this DIM design. However, the proposed DIM design may significantly increase the size of each DIM, thereby increasing the size of the PLD.
In view of the forgoing, it would be desirable to provide a DIM with reduced static and dynamic power consumption that may reduce the overall power consumption of the PLD without significantly increasing the size of the PLD. It would also be desirable to provide multiple reduced-power DIM designs which may provide a variety of techniques for reducing power consumption, such that the optimal DIM may be selected based on its role and position within the PLD.